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N-CHANNEL 100V - 0.23 - 6A SO-8 STripFETTM II POWER MOSFET
TYPE STS2NF100
s s s s
STS2NF100
VDSS 100 V
RDS(on) <0.26
ID 6A
TYPICAL RDS(on) = 0.23 EXCEPTIONAL dv/dt CAPABILITY 100 % AVALANCHE TESTED APPLICATION ORIENTED CHARACTERIZATION
DESCRIPTION
This MOSFET series realized with STMicroelectronics unique STripFET process has specifically been designed to minimize input capacitance and gate charge. It is therefore suitable as primary switch in advanced highefficiency, high-frequency isolated DC-DC converters for Telecom and Computer applications. It is also intended for any applications with low gate drive requirements.
SO-8
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS s HIGH-EFFICIENCY DC-DC CONVERTERS s UPS AND MOTOR CONTROL
ABSOLUTE MAXIMUM RATINGS
Symbol VDS VDGR VGS ID(*) ID IDM(**) Ptot dV/dt (1) EAS (2) Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Peak Diode Recovery voltage slope Single Pulse Avalanche Energy Storage Temperature Max. Operating Junction Temperature Value 100 100 20 2 1.3 8 2.5 0.016 40 200 -65 to 175
(1) ISD 2A, di/dt 300A/s, VDD V (BR)DSS, Tj T JMAX (2) Starting T j = 25 oC, ID = 3A, VDD = 50V
Unit V V V A A A W W/C V/ns mJ C
(**) Pulse width limited by safe operating area. (*) Current limited by the package October 2002
.
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THERMAL DATA
Rthj-amb Tj Tstg (*)Thermal Resistance Junction-ambient Thermal Operating Junction-ambient Storage Temperature 50 -55 to 150 -55 to 150 C/W C C
(*) Mounted on FR-4 board (t [ 10 sec.)
ELECTRICAL CHARACTERISTICS (Tcase = 25 C unless otherwise specified) OFF
Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating TC = 125C VGS = 20 V Min. 100 1 10 100 Typ. Max. Unit V A A nA
ON (*)
Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS VGS = 10 V ID = 250 A ID = 1 A Min. 2 Typ. 3 0.23 Max. 4 0.26 Unit V
DYNAMIC
Symbol gfs (*) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS>ID(on)xRDS(on)max ID = 1 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 0.5 280 45 20 Max. Unit S pF pF pF
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ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions ID = 1 A VDD = 50 V RG = 4.7 VGS = 10 V (Resistive Load, Figure 3) VDD= 80V ID= 1A VGS=10V Min. Typ. 6 10 10 2.5 4 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbol td(off) tf tr(Voff) tf tc Parameter Turn-off Delay Time Fall Time Off-Voltage Rise Time Fall Time Cross-over Time Test Conditions ID = 1 A VDD = 50 V RG = 4.7, VGS = 10 V (Resistive Load, Figure 3) ID = 1 A Vclamp = 80 V RG = 4.7 VGS = 10 V (Inductive Load, Figure 5) Min. Typ. 20 3 19 8 15 Max. Unit ns ns ns ns ns
SOURCE DRAIN DIODE
Symbol ISD ISDM (*) VSD (*) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 2 A VGS = 0 70 175 5 Test Conditions Min. Typ. Max. 6 24 1.3 Unit A A V ns nC A
di/dt = 100A/s ISD = 2 A VDD = 10 V Tj = 150C (see test circuit, Figure 5)
(*)Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. (*)Pulse width limited by safe operating area.
Safe Operating Area
Thermal Impedance
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Output Characteristics Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
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Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature
Source-drain Diode Forward Characteristics
.
.
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Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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SO-8 MECHANICAL DATA
DIM. MIN. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 3.8 0.4 4.8 5.8 1.27 3.81 4.0 1.27 0.6 8 (max.) 0.14 0.015 5.0 6.2 0.65 0.35 0.19 0.25 0.1 mm TYP. MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. inch TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019
0016023
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics (R) 2002 STMicroelectronics - All Rights Reserved All other names are the property of their respective owners. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com
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